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Mission

I designed this site to share my research 
results on the field of Multiple-Valued Logic with university faculties, researchers, engineers, designers, graduate students and interested people all over the world using the Internet.
Preface

Prioritors will be the modern operators for digital systems designs.  Never under estimate them.  Who said in 1849 that the operators founded by Boole will take us to the current age of computers? After 89 years, people realized the significance of Boole's operators by a smart man "Claude Shannon" in 1938. 
How many years will it take to realize the significance of AOP and its prioritors?


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MVL Researches

MVL researches are aimed on developing new theoretical and practical means for designing and analyzing devices in multiple valued logic systems that are more sophisticated, more simpler, more economical, more powerful, more insightful, and more appropriate than the current means. 

Introduction

Binary logic is an area that deals with the representation of data with two values ‘0’ and ‘1’. The problem encountered with binary logic is the large number of bits that is needed to represent data. This problem is reflected at the hardware level in two well-known problems: pinout problem and interconnection problem. A solution to this problem was to increase the number of its logical values and not limit them to two logical values.  This solution gave rise to the development of  the field of Multiple-valued Logic (MVL), which uses multiple logical values to represent data. The number of the logical values is usually expected to be three or more. For example, in a four-valued system, MVL uses four values to represent data. If these values are to be numerical values, then 0,1,2, and 3 would be used. In this way, MVL solves the pinout problem and it simplifies circuit complexity of binary logic circuits. However, MVL designs digital circuits using the  traditional operations MIN, MAX, MV-NOT, and complementary operators. The problem encountered in this design, is the large number of traditional operations that is needed to build up a digital circuit. This  large number increases  complexity and interconnections of MVL circuits. The more operations a MVL circuit needs, the more it gets complex and its interconnections get even more complex. A solution to this problem is to increase its basic operations of design and not limit them to the traditional operators.  This approach will give rise to a new field called Multiple-Operational Logic (MOL), which uses multiple-operations from unary and binary operations to design digital circuits.  Thus, MOL is aimed on introducing, into logical systems, a variety of new operators that will make design more flexible than would be using just the MVL traditional operators

Where and how do we get and select multiple-operations and introduce them into logical systems? The question of "where" is a simple one.  In a z-radix digital system, there are zz unary operations and zz2 binary operations and these operations can be easily enumerated and selected. However, the question of "how" is a new challenging area.

In an effort to answer the "how" question, I developed different means to achieve the aforementioned purpose such as AOP, Degeneracy, and GTODE. AOP is an algebraic system. Degeneracy and GTODE are theories which are used as tools that help in answering the "how" question.

For the time being, I will post information on AOP and later on I will post information on Degeneracy and on GTODE.   

Algebra Of Priority (AOP)

Degeneracy Theory

General Theory of Digital Elements (GTODE)

 

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Last modified: February 17, 2001

IEEE International Symposium MVL

Logic Technical Committee

MVL  International Journal.